An exact method for solving logical loops in reliability analysis

نویسنده

  • Takeshi Matsuoka
چکیده

This paper presents an exact method for solving logical loops in reliability analysis. The systems that include logical loops are usually described by simultaneous Boolean equations. First, present a basic rule of solving simultaneous Boolean equations. Next, show the analysis procedures for three-component system with external supports. Third, more detailed discussions are given for the establishment of logical loop relation. Finally, take up two typical structures which include more than one logical loop. Their analysis results and corresponding GO-FLOW charts are given. The proposed analytical method is applicable to loop structures that can be described by simultaneous Boolean equations, and it is very useful in evaluating the reliability of complex engineering systems. & 2009 Elsevier Ltd. All rights reserved.

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عنوان ژورنال:
  • Rel. Eng. & Sys. Safety

دوره 94  شماره 

صفحات  -

تاریخ انتشار 2009